MC68030 Datasheet, PDF (279/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Exception Processing
When the processor executes an RTE instruction, it examines the stack frame on top of the
active supervisor stack to determine if it is a valid frame and what type of context restoration
it requires. This section describes the processing for each of the stack frame types; refer to
8.3 COPROCESSOR CONSIDERATIONS for a description of the stack frame type formats.
For a normal four-word frame, the processor updates the status register and program
counter with the data read from the stack, increments the stack pointer by eight, and
resumes normal instruction execution.
For the throwaway four-word stack, the processor reads the status register value from the
frame, increments the active stack pointer by eight, updates the status register with the
value read from the stack, and then begins RTE processing again, as shown in Figure 8-8.
The processor reads a new format word from the stack frame on top of the active stack
(which may or may not be the same stack used for the previous operation) and performs the
proper operations corresponding to that format. In most cases, the throwaway frame is on
the interrupt stack and when the status register value is read from the stack, the S and M
bits are set. In that case, there is a normal four-word frame or a ten-word coprocessor mid-
instruction frame on the master stack. However, the second frame may be any format (even
another throwaway frame) and may reside on any of the three system stacks.
For the six-word stack frame, the processor restores the status register and program counter
values from the stack, increments the active supervisor stack pointer by 12, and resumes
normal instruction execution.
For the coprocessor mid-instruction stack frame, the processor reads the status register,
program counter, instruction address, internal register values, and the evaluated effective
address from the stack, restores these values to the corresponding internal registers, and
increments the stack pointer by 20. The processor then reads from the response register of
the coprocessor that initiated the exception to determine the next operation to be performed.
Refer to Section 10 Coprocessor Interface Description for details of coprocessor-related
exceptions.
For both the short and long bus fault stack frames, the processor first checks the format
value on the stack for validity. In addition, for the long stack frame, the processor compares
the version number in the stack with its own version number. The version number is located
in the most significant nibble (bits 15-12) of the word at location SP+$36 in the long stack
frame. This validity check is required in a multiprocessor system to ensure that the data is
properly interpreted by the RTE instruction. The RTE instruction also reads from both ends
of the stack frame to make sure it is accessible. If the frame is invalid or inaccessible, the
processor takes a format error or a bus error exception, respectively. Otherwise, the
processor reads the entire frame into the proper internal registers, deallocates the stack,
and resumes normal processing. Once the processor begins to load the frame to restore its
internal state, the assertion of the BERR signal causes the processor to enter the halted
state with the continuous assertion of the STATUS signal. Refer to 8.2 Bus Fault Recovery
for a description of the processing that occurs after the frame is read into the internal
registers.
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MC68030 USER’S MANUAL
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