MC68030 Datasheet, PDF (503/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Applications Information
MC68EC030
FC2–FC0
A31–A20
A19–A16
A15–A13
A12–A5
A4–A1
A0
AS
DS
R/W
D31–D24
D23–D16
D15–D8
D7–D0
DSACK0
DSACK1
CIIN
CHIP
SELECT
DECODE
VCC
VCC
MC68881/MC68882
CS
SIZE
A4–A1
A0
AS
DS
R/W
D31–D24
D23–D16
D15–D8
D7–D0
DSACK0
DSACK1
MAIN CONTROLLER
CLOCK
COPROCESSOR
CLOCK
Figure 12-2. 32-Bit Data Bus Coprocessor Connection
The chip select (CS) decode circuitry is asynchronous logic that detects when a particular
floating-point coprocessor is addressed. The MC68030 signals used by the logic include the
function code signals (FC=FC2), and the address lines (A13=A19). Refer to Section 10
Coprocessor Interface Description for more information concerning the encoding of these
signals. All or just a subset of these lines may be decoded depending on the number of
coprocessors in the system and the degree of redundant mapping allowed in the system.
12-6
MC68030 USER’S MANUAL
MOTOROLA