MC68030 Datasheet, PDF (531/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Applications Information
12.7.1 Status and Refill
The MC68030 provides the STATUS and REFILL signals to identify internal
microsequencer activity associated with the processing of data in the pipeline. Since bus
cycles are independently controlled and scheduled by the bus controller, information
concerning the processing state of the microsequencer is not available by monitoring bus
signals by themselves. The internal activity identified by the STATUS and REFILL signals
include instruction boundaries, some exception conditions, when the microsequencer has
halted, and instruction pipeline refills. STATUS and REFILL track only the internal
microsequencer activity and are not directly related to bus activity.
As shown in Table 12-4, the number of consecutive clocks during which STATUS is
asserted indicates an instruction boundary, an exception to be processed, or that the
processor has halted. Note that the processor halted condition is an internal error state in
which the microsequencer has shut itself down due to a double bus fault and is not related
to the external assertion of the HALT input signal. The HALT signal only affects bus
operation, not the microsequencer.
Table 12-4. Microsequencer STATUS Indications
Asserted for
1 Clock
2 Clocks
3 Clocks
Continuously
Indicates
Sequencer at instruction boundary will begin execution of next instruction
Sequencer at instruction boundary but will not begin next instruction
immediately due to:
• pending trace exception
OR
• pending interrupt exception
MMU address translation cache miss — processor to begin table search
OR
Exception processing to begin for:
• reset OR
• bus error OR
• address error OR
• spurious interrupt OR
• autovectored interrupt OR
• F-line instruction (no coprocessor responded)
Processor halted due to double bus fault
The REFILL signal identifies when the microsequencer requests an instruction pipeline refill.
Refill requests are a result of having to break sequential instruction execution to handle
nonsequential events. Both exceptions and instructions can cause the assertion of REFILL.
Instructions that cause refills include branches, jumps, instruction traps, returns,
coprocessor general instructions that modify the program counter flow, and status register
manipulations. Logical and arithmetic operations affecting the condition codes of the status
register do not result in a refill request. However, operations like the MOVE <ea>,SR
instruction, which updates the status register, cause a refill request since this can change
the program space as defined by the function codes. When the program space changes, the
processor must fetch data from the new space to replace data already prefetched from the
old program space. Similarly, operations which affect the address translation mechanism of
the memory management unit (MMU) cause a refill request. An instruction like the PMOVE
<ea>,TC, which changes the translation control register, requires the processor to fetch data
MOTOROLA
MC68030 USER’S MANUAL
12-35