MC68030 Datasheet, PDF (362/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
In contrast, standard peripheral hardware is generally accessed through interface registers
mapped into the memory space of the main processor. To use the services provided by the
peripheral, the programmer accesses the peripheral registers with standard processor
instructions. While a peripheral could conceivably provide capabilities equivalent to a
coprocessor for many applications, the programmer must implement the communication
protocol between the main processor and the peripheral necessary to use the peripheral
hardware.
The communication protocol defined for the M68000 coprocessor interface is described in
10.2 Coprocessor Instruction Types. The algorithms that implement the M68000
coprocessor interface are provided in the microcode of the MC68030 and are completely
transparent to the MC68030 programmer's model. For example, floating-point operations
are not implemented in the MC68030 hardware. In a system utilizing both the MC68030 and
the MC68881 or MC68882 floating-point coprocessor, a programmer can use any of the
instructions defined for the coprocessor without knowing that the actual computation is
performed by the MC68881 or MC68882 hardware.
10.1.1 Interface Features
The M68000 coprocessor interface design incorporates a number of flexible capabilities.
The physical coprocessor interface uses the main processor external bus, which simplifies
the interface since no special-purpose signals are involved. With the MC68030, a
coprocessor can use either the asynchronous or synchronous bus transfer protocol. Since
standard bus cycles transfer information between the main processor and the coprocessor,
the coprocessor can be implemented in whatever technology is available to the coprocessor
designer. A coprocessor can be implemented as a VLSI device, as a separate system
board, or even as a separate computer system.
Since the main processor and a M68000 coprocessor can communicate using the
asynchronous bus, they can operate at different clock frequencies. The system designer
can choose the speeds of a main processor and coprocessor that provide the optimum
performance for a given system. If the coprocessor uses the synchronous bus interface all
coprocessor signals and data must be synchronized with the main processor clock. Both the
MC68881 and MC68882 floating-point coprocessors use the asynchronous bus handshake
protocol.
10-2
MC68030 USER’S MANUAL
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