MC68030 Datasheet, PDF (268/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Exception Processing
The STOP instruction does not perform its function when it is traced. A STOP instruction that
begins execution with T1=1 and T0=0 forces a trace exception after it loads the status
register. Upon return from the trace handler routine, execution continues with the instruction
following the STOP, and the processor never enters the stopped condition.
8.1.8 Format Error Exception
Just as the processor checks that prefetched instructions are valid, the processor (with the
aid of a coprocessor, if needed) also performs some checks of data values for control
operations, including the coprocessor state frame format word for a cpRESTORE instruction
and the stack frame format for an RTE instruction.
The RTE instruction checks the validity of the stack format code. For long bus cycle fault
format frames, the RTE instruction also compares the internal version number of the
processor to that contained in the frame at memory location SP+54 (SP+$36). This check
ensures that the processor can correctly interpret internal state information from the stack
frame.
The cpRESTORE instruction passes the format word of the coprocessor state frame to the
coprocessor for validation. If the coprocessor does not recognize the format value, it signals
the MC68030 to take a format error exception. Refer to Section 10 Coprocessor Interface
Description for details of coprocessor-related exceptions.
If any of the checks previously described determine that the format of the stacked data is
improper, the instruction generates a format error exception. This exception saves a short
format stack frame, generates exception vector number 14, and continues execution at the
address in the format exception vector. The stacked program counter value is the logical
address of the instruction that detected the format error.
8.1.9 Interrupt Exceptions
When a peripheral device requires the services of the MC68030 or is ready to send
information that the processor requires, it may signal the processor to take an interrupt
exception. The interrupt exception transfers control to a routine that responds appropriately.
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MC68030 USER’S MANUAL
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