MC68030 Datasheet, PDF (384/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
A coprocessor should usually not place an invalid format word in the save CIR when the
main processor initiates a cpSAVE instruction. A coprocessor, however, may not be able to
support the initiation of a cpSAVE instruction while it is executing a previously initiated
cpSAVE or cpRESTORE instruction. In this situation, the coprocessor can return the invalid
format word when the main processor reads the save CIR to initiate the cpSAVE instruction
while either another cpSAVE or cpRESTORE instruction is executing. If the main processor
reads an invalid format word from the save CIR, it writes the abort mask to the control CIR
and initiates format error exception processing (refer to 10.5.1.5 Format Errors).
10.2.3.2.4 Valid Format Word. When the main processor reads a valid format word from
the save CIR during the cpSAVE instruction, it uses the length field to determine the size of
the coprocessor state frame to save. The length field in the lower eight bits of a format word
is relevant only in a valid format word. During the cpRESTORE instruction, the main
processor uses the length field in the format word read from the effective address in the
instruction to determine the size of the coprocessor state frame to restore.
The length field of a valid format word, representing the size of the coprocessor state frame,
must contain a multiple of four. If the main processor detects a value that is not a multiple of
four in a length field during the execution of a cpSAVE or cpRESTORE instruction, the main
processor writes the abort mask (refer to 10.2.3.2.3 Invalid Format Word) to the control
CIR and initiates format error exception processing.
10.2.3.3 COPROCESSOR CONTEXT SAVE INSTRUCTION. The M68000 coprocessor
context save instruction category consists of one instruction. The coprocessor context save
instruction, denoted by the cpSAVE mnemonic, saves the context of a coprocessor
dynamically without relation to the execution of coprocessor instructions in the general or
conditional instruction categories. During the execution of a cpSAVE instruction, the
coprocessor communicates status information to the main processor by using the
coprocessor format codes.
10.2.3.3.1 Format. Figure 10-15 shows the format of the cpSAVE instruction. The first word
of the instruction is the F-line operation word, which contains the coprocessor identification
code in bits [9-11] and an M68000 effective address code in bits [0-5]. The effective address
encoded in the cpSAVE instruction is the address at which the state frame associated with
the current context of the coprocessor is saved in memory.
10-24
MC68030 USER’S MANUAL
MOTOROLA