MC68030 Datasheet, PDF (408/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
10.4.11 Take Address and Transfer Data Primitive
The take address and transfer data primitive transfers an operand between the coprocessor
and an address supplied by the coprocessor. This primitive applies to general and
conditional category instructions. Figure 10-31 shows the format of the take address and
transfer data primitive.
15
14 13 12 11 10
9
8
CA
PC DR
0
0
1
0
1
70
LENGTH
Figure 10-31. Take Address and Transfer Data Primitive Format
This primitive uses the CA, PC, and DR bits as previously described. If the coprocessor
issues this primitive with CA=0 during a conditional category instruction, the main processor
initiates protocol violation exception processing.
Bits [0-7] of the primitive format specify the operand length, which can be from 0-255 bytes.
The main processor reads a 32-bit address from the operand address CIR. Using a series
of long-word transfers, the processor transfers the operand between this address and the
operand CIR. The DR bit determines the direction of the transfer. The processor reads or
writes the operand parts to ascending addresses, starting at the address from the operand
address CIR. If the operand length is not a multiple of four bytes, the final operand part is
transferred using a one-, two-, or three-byte transfer as required.
The function code used with the address read from the operand address CIR indicates either
supervisor or user data space according to the value of the S bit in the MC68030 status
register.
10-48
MC68030 USER’S MANUAL
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