MC68030 Datasheet, PDF (428/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
10.5.2.2 F-LINE EMULATOR EXCEPTIONS. The F-line emulator exceptions detected by
the MC68030 are either explicitly or implicitly related to the encodings of F-line operation
words in the instruction stream. If the main processor determines that an F-line operation
word is not valid, it initiates F-line emulator exception processing. Any F-line operation word
with bits [8:6]=110 or 111 causes the MC68030 to initiate exception processing without
initiating any communication with the coprocessor for that instruction. Also, an operation
word with bits [8:6]=000-101 that does not map to one of the valid coprocessor instructions
in the instruction set causes the MC68030 to initiate F-line emulator exception processing.
If the F-line emulator exception is either of these two situations, the main processor does
not write to the control CIR prior to initiating exception processing.
F-line exceptions can also occur if the operations requested by a coprocessor response
primitive are not compatible with the effective address type in bits [0-5] of the coprocessor
instruction operation word. The F-line emulator exceptions that can result from the use of
the M68000 coprocessor response primitives are summarized in Table 10-6. If the exception
is caused by receiving an invalid primitive, the main processor aborts the coprocessor
instruction in progress by writing an abort mask (refer to 10.3.2 Control CIR) to the control
CIR prior to F-line emulator exception processing.
Another type of F-line emulator exception occurs when a bus error occurs during the
coprocessor interface register access that initiates a coprocessor instruction. The main
processor assumes that the coprocessor is not present and takes the exception.
When the main processor initiates F-line emulator exception processing, it uses the four-
word pre-instruction exception stack frame (refer to Figure 10-41) and the F-line emulator
exception vector number 11. Thus, if the exception handler does not modify the stack frame,
the main processor attempts to restart the instruction that caused the exception after it
executes an RTE instruction to return from the exception handler.
If the cause of the F-line exception can be emulated in software, the handler stores the
results of the emulation in the appropriate registers of the programmer's model and in the
status register field of the saved stack frame. The exception handler adjusts the program
counter field of the saved stack frame to point to the next instruction operation word and
executes the RTE instruction. The MC68030 then executes the instruction following the
instruction that was emulated.
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MC68030 USER’S MANUAL
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