MC68030 Datasheet, PDF (255/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

SECTION 8
EXCEPTION PROCESSING
Exception processing is defined as the activities performed by the processor in preparing to
execute a handler routine for any condition that causes an exception. In particular, exception
processing does not include execution of the handler routine itself. An introduction to
exception processing, as one of the processing states of the MC68030 processor, was given
in Section 4 Processing States. This section describes exception processing in detail,
describing the processing for each type of exception. It describes the return from an
exception and bus fault recovery. This section also describes the formats of the exception
stack frames. For details of MMU-related exceptions, refer to Section 9 Memory
Management Unit. For more detail on protocol violation and coprocessor-related
exceptions, refer to Section 10 Coprocessor Interface Description. Also, for more detail
on exceptions defined for floating-point coprocessors, refer to the user's manual for the
MC68881/MC68882.
8.1 EXCEPTION PROCESSING SEQUENCE
Exception processing occurs in four functional steps. However, all individual bus cycles
associated with exception processing (vector acquisition, stacking, etc.) are not guaranteed
to occur in the order in which they are described in this section. Nonetheless, all addresses
and offsets from the stack pointer are guaranteed to be as described.
The first step of exception processing involves the status register. The processor makes an
internal copy of the status register. Then the processor sets the S bit, changing to the
supervisor privilege level. Next, the processor inhibits tracing of the exception handler by
clearing the T1 and T0 bits. For the reset and interrupt exceptions, the processor also
updates the interrupt priority mask.
In the second step, the processor determines the vector number of the exception. For
interrupts, the processor performs an interrupt acknowledge cycle (a read from the CPU
address space type $F; see Figures 7-45 and 7-46) to obtain the vector number. For
coprocessor-detected exceptions, the vector number is included in the coprocessor
exception primitive response.
MOTOROLA
MC68030 USER’S MANUAL
8-1