MC68030 Datasheet, PDF (374/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
Bits [0-5] of the F-line operation word contain the coprocessor condition selector field. The
MC68030 writes the entire operation word to the condition CIR to initiate execution of the
branch instruction by the coprocessor. The coprocessor uses bits [0-5] to determine which
condition to evaluate.
If the coprocessor requires additional information to evaluate the condition, the branch
instruction format can include this information in extension words. Following the F-line
operation word, the number of extension words is determined by the coprocessor design.
The final word(s) of the cpBcc instruction format contains the displacement used by the main
processor to calculate the destination address when the branch is taken.
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MC68030 USER’S MANUAL
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