MC68030 Datasheet, PDF (48/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Data Organization and Addressing Capabilities
2.4.2 Address Register Direct Mode
In the address register direct mode, the operand is in the address register specified by the
effective address register field.
GENERATION:
EA = An
ASSEMBLER SYNTAX:
An
MODE:
001
REGISTER:
n
31
0
ADDRESS REGISTER:
An
OPERAND
NUMBER OF EXTENSION WORDS: 0
2.4.3 Address Register Indirect Mode
In the address register indirect mode, the operand is in memory, and the address of the
operand is in the address register specified by the register field.
GENERATION:
EA = (An)
ASSEMBLER SYNTAX:
(An)
MODE:
010
REGISTER:
n
31
0
ADDRESS REGISTER:
An
MEMORY ADDRESS
31
0
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS: 0
OPERAND
2.4.4 Address Register Indirect with Postincrement Mode
In the address register indirect with postincrement mode, the operand is in memory, and the
address of the operand is in the address register specified by the register field. After the
operand address is used, it is incremented by one, two, or four depending on the size of the
operand: byte, word, or long word. Coprocessors may support incrementing for any size of
operand up to 255 bytes. If the address register is the stack pointer and the operand size is
byte, the address is incremented by two rather than one to keep the stack pointer aligned to
a word boundary.
GENERATION:
EA = (An)
An = An + SIZE
ASSEMBLER SYNTAX:
(An) +
MODE:
011
REGISTER:
n
31
0
ADDRESS REGISTER:
An
MEMORY ADDRESS
OPERAND LENGTH ( 1, 2, OR 4):
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS: 0
+
31
0
OPERAND
2-10
MC68030 USER’S MANUAL
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