MC68030 Datasheet, PDF (432/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
10.5.2.8 ADDRESS AND BUS ERRORS. Coprocessor-instruction-related bus faults can
occur during main processor bus cycles to CPU space to communicate with a coprocessor
or during memory cycles run as part of the coprocessor instruction execution. If a bus error
occurs during the coprocessor interface register access that is used to initiate a coprocessor
instruction, the main processor assumes that the coprocessor is not present and takes an
F-line emulator exception as described in 10.5.2.2 F-Line Emulator Exceptions. That is,
the processor takes an F-line emulator exception when a bus error occurs during the initial
access to a CIR by a coprocessor instruction. If a bus error occurs on any other coprocessor
access or on a memory access made during the execution of a coprocessor instruction, the
main processor performs bus error exception processing as described in 8.1.2 Bus Error
Exception. After the exception handler has corrected the cause of the bus error, the main
processor can return to the point in the coprocessor instruction at which the fault occurred.
An address error occurs if the MC68030 attempts to prefetch an instruction from an odd
address. This can occur if the calculated destination address of a cpBcc or cpDBcc
instruction is odd or if an odd value is transferred to the scanPC with the transfer status
register and the scanPC response primitive. If an address error occurs, the MC68030
performs exception processing for a bus fault as described in 8.1.3 Address Error
Exception.
10.5.3 Coprocessor Reset
Either an external reset signal or a RESET instruction can reset the external devices of a
system. The system designer can design a coprocessor to be reset and initialized by both
reset types or by external reset signals only. To be consistent with the MC68030 design, the
coprocessor should be affected by external reset signals only and not by RESET
instructions, because the coprocessor is an extension to the main processor programming
model and to the internal state of the MC68030.
10.6 COPROCESSOR SUMMARY
Coprocessor instruction formats are presented for reference. Refer to the M68000PM/AD,
M68000 Programmer's Reference Manual, for detailed information on coprocessor
instructions.
10-72
MC68030 USER’S MANUAL
MOTOROLA