MC68030 Datasheet, PDF (534/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Applications Information
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Figure 12-22. Processor Halted
12.7.2 Real-Time Instruction Trace
Microprocessor-based systems used for real-time applications typically lack development
aids for program debug. The real-time environment does not allow program instruction
execution to arbitrarily stop to handle debugging events. These systems include control
applications where mechanical events cannot halt, such as robotics, automotive, and
industrial control and emulator systems which may need to keep the target system executing
in real time.
To solve the problems inherent with real-time systems, the MC68030 incorporates extra
hardware-based features to enhance program debug. Real-time systems cannot take
advantage of the trace exception mechanism built into all M68000 Family processors since
this takes processing time away from real-time events. Additional output pins have been
incorporated into the MC68030 to gain real-time visibility into the processor. Tracing
capability can be added by decoding MC68030 control signals to detect which cycles are
important for tracking. Post analysis of collected data allows for program debug.
Several problems exist with an external trace mechanism. These problems include
determining which cycles are important for tracking program flow, detecting if instructions
obtained in prefetch operations are discarded by the execution unit, and the inability of
external trace circuitry to capture accesses to on-chip cache memories.
External trace hardware used for program debug must be synchronized to the MC68030 bus
activity. Since all clock cycles are not traced in a program debug environment, the trace
hardware requires a sampling signal. For external read and write operations, trace sampling
occurs when the data bus contains valid data. Two modes of external bus operation are
possible: the synchronous mode in which the system returns the STERM signal and the
asynchronous mode in which the system responds with the DSACK1 and/or the DSACK0
signals. Both modes of bus operation need to generate a sampling signal when valid data
is present on the bus. This allows for tracing data flow in and out of the processor, which is
the basis for tracking program execution.
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MC68030 USER’S MANUAL
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