MC68030 Datasheet, PDF (370/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
10.2.1.1 FORMAT. Figure 10-6 shows the format of a general type instruction.
15
14
13
12
11
9
8
7
6
5
0
1
1
1
1
CpID
0
0
0
EFFECTIVE ADDRESS
COPROCESSOR COMMAND
OPTIONAL EFFECTIVE ADDRESS OR COMPRESSOR-DEFINED EXTENSION WORDS
Figure 10-6. Coprocessor General Instruction Format (cpGEN)
The mnemonic cpGEN is a generic mnemonic used in this discussion for all general
instructions. The mnemonic of a specific general instruction usually suggests the type of
operation it performs and the coprocessor to which it applies. The actual mnemonic and
syntax used to represent a coprocessor instruction is determined by the syntax of the
assembler or compiler that generates the object code.
A coprocessor general type instruction consists of at least two words. The first word of the
instruction is an F-line operation code (bits [15:12]=1111). The CpID field of the F-line
operation code is used during the coprocessor access to indicate which of the coprocessors
in the system executes the instruction. During accesses to the coprocessor interface
registers (refer to 10.1.4.2 Processor-Coprocessor Interface), the processor places the
CpID on address lines A13-A15.
Bits [8:6]=000 indicate that the instruction is in the general instruction category. Bits 0-5 of
the F-line operation code sometimes encodes a standard M68000 effective address
specifier (refer to 2.5 Effective Address Encoding Summary). During the execution of a
cpGEN instruction, the coprocessor can use a coprocessor response primitive to request
that the MC68030 perform an effective address calculation necessary for that instruction.
Using the effective address specifier field of the F-line operation code, the processor then
determines the effective addressing mode. If a coprocessor never requests effective
address calculation, bits 0-5 can have any value (don't cares).
The second word of the general-type instruction is the coprocessor command word. The
main processor writes this command word to the command CIR to initiate execution of the
instruction by the coprocessor.
10-10
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