MC68030 Datasheet, PDF (353/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Memory Management Unit
The translation table structure consists of:
CRP → upper level table in the task control block, which contains 32 long pointers:
[0] → lower level table common to all tasks; maps all operating system areas (first 4
Mbytes of virtual space). This common table contains 512 short-page entries
(2K bytes).
[1] → lower level table for first 16 Mbytes of user program/data/stack area.
•
•
•
[31] → lower level table for last 16 Mbytes (of 496 total) of user program/data/stack
area.
The user program can only access virtual addresses starting at 16 Mbytes and extending
upward to the limit of 512 Mbytes. The code, the data, and the stacks for user tasks are
allocated in this area of virtual memory. Supervisor programs can access the entire virtual
map; they can access addresses that directly access the I/O ports as well as the entire
physical memory at untranslated addresses. The address tables are set up so that virtual
addresses are equal to the physical addresses for the supervisor between 1 and 3 Mbytes.
Folding the physical address space into the virtual space greatly simplifies operations that
use physical addresses. The folding does not necessarily mean that the virtual addresses
are the same as the physical addresses. For example, the boot/diagnostic ROM at physical
address zero could be assigned a virtual address of 3 Mbytes. However, any external bus
masters or circuitry (such as breakpoint registers) resident on the physical side of the bus
must have physical addresses. This requires the overhead of operating system code to
perform address translation.
This virtual memory map provides supervisor addresses that are unique with respect to user
addresses; all supervisor routines can directly access any user area without being restricted
to certain instructions or addressing modes. The separate user and supervisor maps
suggest that two root pointers should be used, one for the supervisor map and one for the
user map. However, the supervisor must be able to access user translation tables for proper
access to user data items. With separate root pointers, the supervisor table structure must
be linked to that of the user. To do this requires an additional level of table lookup (function
code level) for the supervisor address table.
This example uses a simpler scheme instead. Only the CPU root pointer is used, and, for
each task, the first entry of the upper level table (for the supervisor portion, the first 16
Mbytes of virtual address space) points to the same lower level table. This common lower
level table has supervisor protection and maps the entire virtual operating system, physical
I/O, and physical memory areas. This scheme avoids the requirement for extra lookup levels
or pointer manipulations during a task switch to furnish correct access across the user/
supervisor boundary. All the operating system has to do when creating the address table for
a new task is to set the first upper level table entry to point to the common page table of the
supervisor.
MOTOROLA
MC68030 USER’S MANUAL
9-65