MC68030 Datasheet, PDF (402/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
10.4.8 Evaluate and Transfer Effective Address Primitive
The evaluate and transfer effective address primitive evaluates the effective address
specified in the coprocessor instruction operation word and transfers the result to the
coprocessor. This primitive applies to general category instructions. If this primitive is issued
by the coprocessor during the execution of a conditional category instruction, the main
processor initiates protocol violation exception processing. Figure 10-28 shows the format
of the evaluate and transfer effective address primitive.
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CA PC 0
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Figure 10-28. Evaluate and Transfer Effective Address Primitive Format
This primitive uses the CA and PC bits as previously described.
When the main processor reads this primitive while executing a general category instruction,
it evaluates the effective address specified in the instruction. At this point, the scanPC
contains the address of the first of any required effective address extension words. The main
processor increments the scanPC by two after it references each of these extension words.
After the effective address is calculated, the resulting 32-bit value is written to the operand
address CIR.
The MC68030 only calculates effective addresses for control alterable addressing modes in
response to this primitive. If the addressing mode in the operation word is not a control
alterable mode, the main processor aborts the instruction by writing a $0001 to the control
CIR and initiates F-line emulation exception processing (refer to 10.5.2.2 F-Line Emulator
Exceptions).
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MC68030 USER’S MANUAL
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