MC68030 Datasheet, PDF (337/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Memory Management Unit
LOGICAL ADDRESS MASK
This 8-bit field contains a mask for the LOGICAL ADDRESS BASE field. Setting a bit in
this field causes the corresponding bit of the LOGICAL ADDRESS BASE field to be ig-
nored. Blocks of memory larger than 16 Mbytes can be transparently translated by setting
some of the logical address mask bits to ones. Normally, the low-order bits of this field are
set to define contiguous blocks larger than 16 Mbytes, although this is not required.
9.7.4 MMU Status Register
The MMU status register (MMUSR) is a 16-bit register that contains the status information
returned by execution of the PTEST instruction. The PTEST instruction searches either the
ATC (PTEST with level 0) or the translation tables (PTEST with levels of 1-7) to determine
status information about the translation of a specified logical address. The MMUSR is shown
in Figure 9-38.
(UNABLE TO LOCATE ART)
Figure 9-38. MMU Status Register (MMUSR) Format
MOTOROLA
MC68030 USER’S MANUAL
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