MC68030 Datasheet, PDF (53/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Data Organization and Addressing Capabilities
2.4.10 Memory Indirect Preindexed Mode
In this mode, the operand and its address are in memory. The processor calculates an
intermediate indirect memory address using the base register (An), a base displacement
(bd), and the index operand (Xn.SIZE * SCALE). The processor accesses a long word at
this address and adds the outer displacement to yield the effective address. Both
displacements and the index register contents are sign-extended to 32 bits.
In the syntax for this mode, brackets enclose the values used to calculate the intermediate
memory address. All four user-specified values are optional. Both the base and outer
displacements may be null, word, or long word. When a displacement is omitted or an
element is suppressed, its value is taken as zero in the effective address calculation.
GENERATION:
ASSEMBLER SYNTAX:
EA = (bd + An + Xn.SIZE*SCALE) + od
MODE:
([bd,An,Xn.SIZE*SCALE],od)
ADDRESS REGISTER:
110
31
0
An
MEMORY ADDRESS
31
0
BASE DISPLACEMENT:
SIGN-EXTENDED VALUE
+
31
0
SIGN-EXTENDED VALUE
7
0
SCALE VALUE
X
+
INDEX REGISTER:
SCALE:
31
0
INDIRECT MEMORY ADDRESS
POINTS TO
31
0
VALUE AT INDIRECT MEMORY ADDRESS
31
0
OUTER DISPLACEMENT:
SIGN-EXTENDED VALUE
+
31
0
EFFECTIVE ADDRESS:
NUMBER OF EXTENSION WORDS:
1,2, 3, 4, OR 5
OPERAND
MOTOROLA
MC68030 USER’S MANUAL
2-15