MC68030 Datasheet, PDF (429/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
The exception handler should also check the copy of the status register on the stack to
determine whether tracing is on. If tracing is on, the trace exception processing should also
be emulated. Refer to 8.1.7 Trace Exception.
10.5.2.3 PRIVILEGE VIOLATIONS. Privilege violations can result from the cpSAVE and
cpRESTORE instructions and, also, from the supervisor check coprocessor response
primitive. The main processor initiates privilege violation exception processing if it attempts
to execute either the cpSAVE or cpRESTORE instruction when it is in the user state (S=0
in status register). The main processor initiates this exception processing prior to any
communication with the coprocessor associated with the cpSAVE or cpRESTORE
instructions.
If the main processor is executing a coprocessor instruction in the user state when it reads
the supervisor check primitive, it aborts the coprocessor instruction in progress by writing an
abort mask (refer to 10.3.2 Control CIR) to the control CIR. The main processor then
performs privilege violation exception processing.
If a privilege violation occurs, the main processor initiates exception processing using the
four-word pre-instruction stack frame (refer to Figure 10-41) and the privilege violation
exception vector number 8. Thus, if the exception handler does not modify the stack frame,
the main processor attempts to restart the instruction during which the exception occurred
after it executes an RTE to return from the handler.
10.5.2.4 CPTRAPCC INSTRUCTION TRAPS. If, during the execution of a cpTRAPcc
instruction, the coprocessor returns the TRUE condition indicator to the main processor with
a null primitive, the main processor initiates trap exception processing. The main processor
uses the six-word post-instruction exception stack frame (refer to Figure 10-45) and the trap
exception vector number 7. The scanPC field of this stack frame contains the address of the
instruction following the cpTRAPcc instruction. The processing associated with the
cpTRAPcc instruction can then proceed, and the exception handler can locate any
immediate operand words encoded in the cpTRAPcc instruction using the information
contained in the six-word stack frame. If the exception handler does not modify the stack
frame, the main processor executes the instruction following the cpTRAPcc instruction after
it executes an RTE instruction to exit from the handler.
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MC68030 USER’S MANUAL
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