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| MC68030 Datasheet, PDF (471/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR | |||
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Instruction Execution Timing
11.6.5 Jump Effective Address (Continued)
Address Mode
Head
)
FULL FORMAT EXTENSION WORD(S)
Tail
I-Cache Case No-Cache Case
(d16,An) or (d16,PC)
% (d16,An,Xn) or (d16,PC,Xn)
([d16,An]) or ([d16,PC])
([d16,An],Xn) or ([d16,PC],Xn)
([d16,An],d16) or ([d16,PC],d16)
([d16,An],Xn,d16) or ([d16,PC],Xn,d16)
([d16,An],d32) or ([d16,PC],d32)
([d16,An],Xn,d32) or ([d16,PC],Xn,d32)
% (B)
(d16,B)
(d32,B)
([B])
([B],I)
([B],d16)
([B],I,d16)
([B],d32)
([B],d32)
([B],I,d32)
([d16,B])
([d16,B],I)
([d16,B],d16)
([d16,B],I,d16)
([d16,B],d32)
([d16,B],I,d32)
([d32,B])
([d32,B],I)
([d32,B],d16)
([d32,B],I,d16)
([d32,B],d32)
([d32,B],I,d32)
2
0
6+op head
0
2
0
2
0
2
0
2
0
2
0
2
0
6+op head
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
4
0
6(0/0/0)
6(0/0/0)
10(1/0/0)
10(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
6(0/0/0)
8(0/0/0)
12(0/0/0)
10(1/0/0)
10(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
14(1/0/0)
14(1/0/0)
14(1/0/0)
14(1/0/0)
16(1/0/0)
16(1/0/0)
18(1/0/0)
18(1/0/0)
18(1/0/0)
18(1/0/0)
B = Base address; 0, An, PC, Xn, An+Xn, PC+Xn. Form does not affect timing.
I = Index; 0, Xn
% = Total head for effective address timing includes the head time for the operation.
NOTE: Xn cannot be in B and I at the same time. Scaling and size of Xn do not affect timing.
6(0/0/0)
6(0/0/0)
10(1/1/0)
10(1/1/0)
12(1/1/0)
12(1/1/0)
12(1/1/0)
12(1/1/0)
6(0/0/0)
9(0/1/0)
13(0/1/0)
10(1/1/0)
10(1/1/0)
12(1/1/0)
12(1/1/0)
12(1/1/0)
12(1/1/0)
12(1/1/0)
13(1/1/0)
13(1/1/0)
15(1/1/0)
15(1/1/0)
15(1/1/0)
15(1/1/0)
17(1/2/0)
17(1/2/0)
19(1/2/0)
19(1/2/0)
19(1/2/0)
19(1/2/0)
11-36
MC68030 USERâS MANUAL
MOTOROLA
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