MC68030 Datasheet, PDF (50/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Data Organization and Addressing Capabilities
2.4.6 Address Register Indirect with Displacement Mode
In the address register indirect with displacement mode, the operand is in memory. The
address of the operand is the sum of the address in the address register plus the sign-
extended 16-bit displacement integer in the extension word. Displacements are always sign-
extended to 32 bits prior to being used in effective address calculations.
GENERATION:
EA = (An) + d16
ASSEMBLER SYNTAX:
(d _16,An)
MODE:
101
REGISTER:
n
31
0
ADDRESS REGISTER:
An
MEMORY ADDRESS
31
15
0
DISPLACEMENT:
SIGN EXTENDED
INTEGER
+
31
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS: 1
0
OPERAND
2.4.7 Address Register Indirect with Index (8-Bit Displacement) Mode
This addressing mode requires one extension word that contains the index register indicator
and an 8-bit displacement. The index register indicator includes size and scale information.
In this mode, the operand is in memory. The address of the operand is the sum of the
contents of the address register, the sign-extended displacement value in the low-order
eight bits of the extension word, and the sign-extended contents of the index register
(possibly scaled). The user must specify the displacement, the address register, and the
index register in this mode.
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
EA = (An) + (XN) + d8
(d _{8,An,Xn.SIZE*SCALE)}
110
n
An
31
0
MEMORY ADDRESS
31
7
0
DISPLACEMENT:
SIGN EXTENDED
INTEGER
+
31
0
INDEX REGISTER
SIGN-EXTENDED VALUE
SCALE:
7
0
SCALE VALUE
X
+
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS:
1
31
0
OPERAND
2-12
MC68030 USER’S MANUAL
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