MC68030 Datasheet, PDF (375/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
10.2.2.1.2 Protocol. Figure 10-8 shows the protocol for the cpBcc.L and cpBcc.W
instructions. The main processor initiates the instruction by writing the F-line operation word
to the condition CIR to transfer the condition selector to the coprocessor. The main
processor then reads the response CIR to determine its next action. The coprocessor can
return a response primitive to request services necessary to evaluate the condition. If the
coprocessor returns the false condition indicator, the main processor executes the next
instruction in the instruction stream. If the coprocessor returns the true condition indicator,
the processor adds the displacement to the MC68030 scanPC (refer to 10.4.1 ScanPC) to
determine the address of the next instruction for the main processor to execute. The scanPC
must be pointing to the location of the first word of the displacement in the instruction stream
when the address is calculated. The displacement is a twos-complement integer that can be
either a 16-bit word or a 32-bit long word. The processor sign-extends the 16-bit
displacement to a long-word value for the destination address calculation.
10.2.2.2 SET ON COPROCESSOR CONDITION INSTRUCTION. The set on coprocessor
condition instructions set or reset a flag (a data alterable byte) according to a condition
evaluated by the coprocessor. The operation of this instruction is similar to the operation of
the Scc instruction in the M68000 Family instruction set. Although the Scc instruction and
the cpScc instruction do not explicitly cause a change of program flow, they are often used
to set flags that control program flow.
10.2.2.2.1 Format. Figure 10-11 shows the format of the set on coprocessor condition
instruction, denoted by the cpScc mnemonic.
15
14
13
12
11
9
8
7
6
5
0
1
1
1
1
CpID
0
0
1
EFFECTIVE ADDRESS
CONDITION SELECTOR
OPTIONAL COPROCESSOR-DEFINED WORDS
OPTIONAL EFFECTIVE ADDRESS EXTENSION WORDS(0-5WORDS)
Figure 10-11. Set On Coprocessor Condition (cpScc)
MOTOROLA
MC68030 USER’S MANUAL
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