MC68030 Datasheet, PDF (301/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Memory Management Unit
9.3 TRANSPARENT TRANSLATION
Two independent transparent translation registers (TT0 and TT1) in the MMU optionally
define two blocks of the logical address space that are directly translated to the physical
address spaces. The MMU does not explicitly check write protection for the addresses in
these blocks, but a block can be specified as transparent only for read cycles. The blocks of
addresses defined by the TTx registers include at least 16M bytes of logical address space;
the two blocks can overlap, or they can be separate.
The following description of the address comparison assumes that both TT0 and TT1 are
enabled; however, each TTx register can be independently disabled. A disabled TTx
register is completely ignored.
When the MMU receives an address to be translated, the function code and the eight high-
order bits of the address are compared to the block of addresses defined by TT0 and TT1.
The address space block for each TTx register is defined by the base function code, the
function code mask, the logical base address, and the logical address mask. When a bit in
a mask field is set, the corresponding bit of the base function code or logical base address
is ignored in the function code and address comparison. Setting successively higher order
bits in the address mask increases the size of the transparently translated block.
The address for the current bus cycle and a TTx register address match when the function
code bits and address bits (not including masked bits) are equal. Each TTx register can
specify read accesses or write accesses as transparent. In that case, the internal read/write
signal must match the R/W bit in the TTx register for the match to occur. The selection of
the type of access (read or write) can also be masked. The read/write mask bit (RWM) must
be set for transparent translation of addresses used by instructions that execute read-
modify-write operations. Otherwise, neither the read nor write portions of read-modify-write
operations are mapped transparently with the TTx registers, regardless of the function code
and address bits for the individual cycles within a read-modify-write operation.
MOTOROLA
MC68030 USER’S MANUAL
9-13