MC68030 Datasheet, PDF (515/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

CLK
A31-A0
AS
DSACK1/DSACK0
STERM
BERR, HALT
D31-D0
S0
S1
S2
a
b
Applications Information
S0
c
eg
d
fh
NOTE: This diagram illustrates access time calculations only. DSACK1/DSACK0 and STERM should never be asserted
together during the same bus cycle.
FIG 12-10
Figure 12-10. Example PAL Equations for Two-Clock Memory Bank
MOTOROLA
MC68030 USER’S MANUAL
12-19