MC68030 Datasheet, PDF (35/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Introduction
Mnemonic
ABCD
ADD
ADDA
ADDI
ADDQ
ADDX
AND
ANDI
ASL, ASR
Bcc
BCHG
BCLR
BFCHG
BFCLR
BFEXTS
BFEXTU
BFFO
BFINS
BFSET
BFTST
BKPT
BRA
BSET
BSR
BTST
CAS
CAS 2
CHK
CHK2
CLR
CMP
CMPA
CMPI
CMPM
CMP2
DBcc
DIVS, DIVSL
DIVU, DIVUL
EOR
EORI
EXG
EXT, EXTB
ILLEGAL
JMP
JSR
LEA
LINK
LSL, LSR
MOVE
MOVEA
MOVE CCR
MOVE SR
Table 1-2. Instruction Set
Description
Add Decimal with Extend
Add
Add Address
Add Immediate
Add Quick
Add with Extend
Logical AND
Logical AND Immediate
Arithmatic Shift Left and Right
Branch Conditionally
Test Bit and Change
Test Bit and Clear
Test Bit Feild and Change
Test Bit Feild and Clear
Signed Bit Feild Extract
Unsigned Bit Feild Extract
Bit Feild Find First One
Bit Feild Insert
Test Bit Feild and Set
Test Bit Feild
Breakpoint
Branch
Test Bit and Set
Branch to Subroutine
Test Bit
Compare and Swap Operands
Compare and Swap Dual Operands
Check Register Against Bound
Check Register Against Upper and
Lower Bounds
Clear
Compare
Compare Address
Compare Immediate
Compare Memory to Memory
Compare Registre Against Upper and
Lower Bounds
Test Condition, Decrement and Branch
Signed Divide
Unsigned Divide
Logical Exclusive OR
Logical Exclusive OR Immediate
Exchange Registers
Sign Extend
Take Illegal Instruction Trap
Jump
Jump to Subroutine
Load Effective Address
Link and Allocate
Logical Shift Left and Right
Move
Move Address
Move Condition Code Register
Move Status Register
Mnemonic
Description
MOVE USP Move User Stack Pointer
MOVEC
Move Control Register
MOVEM
Move Multiple Registers
MOVEP
Move Periphral
MOVEQ
Move Quick
MOVES
Move Alternate Address Space
MULS
Signed Multiply
MULU
Unsigned Multiply
NBCD
Negate Decimal with Extend
NEG
Negate
NEGX
Negate with Extend
NOP
No Operation
NOT
Logical Compliment
OR
Logical Inclusive OR
ORI
Logical Inclusive OR Immediate
ORI CCR
Logical Inclusive OR Immediate to
Condition Codes
ORI SR
Logical Inclusive OR Immediate to
Status Register
PACK
Pack BCD
PEA
Push Effective Address
PFLUSH
Flush Entry(ies) in the ATC
PFLUSHA Flush All Entries in the ATC
PLOADR,
Load Entry into the ATC
PLOADW
PMOVE
Move to-from MMU Registers
PMOVEFD Move to-from MMU Registers with
Flush Disable
PTESTR
Test a Logical Address
PTESTW
RESET
Reset External Devices
ROL, ROR Rotate Left and Right
ROXL, ROXR Rotate With Extend Left and Right
RTD
Return and Deallocate
RTE
Return from Exception
RTR
Return and Restore Codes
RTS
Return from Subroutine
SBCD
Subtract Decimal With Extend
Scc
Set Conditionally
STOP
Stop
SUB
Subtract
SUBA
Subtract Immediate
SUBI
Subtract Quick
SUBQ
Subtract with Extend
SUBX
Swap Register Words
SWAP
Test Operand and Set
TAS
Trap
TRAP
Trap Conditionally
TRAPcc
Trap on Overflow
TRAPV
Test on Overflow
TST
Test Operand
UNLK
UNPK
Unlink
Unpack BCD
1-12
MC68030 USER’S MANUAL
MOTOROLA