MC68030 Datasheet, PDF (271/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Exception Processing
EXTERNAL IPL2-IPL0
LEVEL 6 EXAMPLE:
100 ($3)
SR MASK (I2-I0)
ACTION
101 ($5) INITIAL CONDITIONS
IF
001 ($6)
THEN
110 ($6)
AND LEVEL 6 INTERRUPT (LEVEL COMPARISON)
IF
100 ($3)
AND STILL
110 ($6)
THEN NO ACTION
IF
001 ($6)
AND STILL
110 ($6)
THEN NO ACTION
IF STILL 001 ($6)
AND RTE SO THAT 101 ($5)
THEN LEVEL 6 INTERRUPT (LEVEL COMPARISON)
LEVEL 7 EXAMPLE:
100 ($3)
101 ($5) INITIAL CONDITIONS
IF
000 ($7)
THEN
111 ($7)
AND LEVEL 7 INTERRUPT (TRANSITION)
IF
100 ($3)
AND STILL
111 ($7)
THEN NO ACTION
IF
000 ($7)
AND STILL
111 ($7)
THEN LEVEL 7 INTERRUPT (TRANSITION)
IF STILL 000 ($7)
AND RTE SO THAT 101 ($5)
THEN LEVEL 7 INTERRUPT (LEVEL COMPARISON)
Figure 8-3. Interrupt Recognition Examples
Note that a mask value of 6 and a mask value of 7 both inhibit request levels 1-6 from being
recognized. In addition, neither masks a transition to an interrupt request level of 7. The only
difference between mask values of 6 and 7 occurs when the interrupt request level is 7 and
the mask value is 7. If the mask value is lowered to 6, a second level 7 interrupt is
recognized.
The MC68030 asserts the interrupt pending signal (IPEND) when it makes an interrupt
request pending. Figure 8-4 shows the assertion of IPEND relative to the assertion of an
interrupt level on the IPL lines. IPEND signals to external devices that an interrupt exception
will be taken at an upcoming instruction boundary (following any higher priority exception).
MOTOROLA
MC68030 USER’S MANUAL
8-17