MC68030 Datasheet, PDF (84/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Instruction Set Summary
Instruction
ADD
ADDA
ADDI
ADDQ
ADDX
CLR
CMP
CMPA
CMPI
CMPM
CMP2
DIVS/DIVU
DIVSL/DIVUL
EXT
EXTB
MULS/MULU
NEG
NEGX
SUB
SUBA
SUBI
SUBQ
SUBX
Table 3-2. Integer Arithmetic Operations
Operand Syntax
Dn,〈ea〉
〈ea〉,Dn
〈ea〉,An
#〈data〉,〈ea〉#〈data〉,
〈ea〉
Dn,Dn
–(An),–(An)
〈ea〉
〈ea〉,Dn
〈ea〉,An
#〈data〉,〈ea〉
(An) +,(An) +
〈ea〉,Rn
〈ea〉,Dn
〈ea〉,Dr:Dq
〈ea〉,Dq
〈ea〉,Dr:Dq
Dn
Dn
Dn
〈ea〉,Dn
〈ea〉,Dl
(ea〉,Dh:Dl
〈ea〉
〈ea〉
〈ea〉,Dn
Dn,〈ea〉
〈ea〉,An
#〈data〉,〈ea〉
#〈data〉,〈ea〉
Dn,Dn
–(An),–(An)
Operand Size
8, 16, 32
8, 16, 32
16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
8, 16, 32
8, 16, 32
8, 16, 32
32/16 → 16:16
64/32 → 32:32
32/32 → 32
32/32 → 32:32
8 → 16
16 → 32
8 → 32
16x16 → 32
32x32 → 32
32x32 → 64
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Operation
source + destination → destination
immediate data + destination → destination
source + destination + X → destination
0 → destination
destination - source
destination - immediate data
destination - source
lower bound < = Rn < = upper bound
destination/source → destination (signed or unsigned)
sign-extended destination → destination
source y destination → destination (signed or unsigned)
0 - destination → destination
0 - destination - X → destination
destination = source → destination
destination - immediate data → destination
destination - source — X → destination
3.2.3 Logical Instructions
The logical operation instructions (AND, OR, EOR, and NOT) perform logical operations
with all sizes of integer data operands. A similar set of immediate instructions (ANDI, ORI,
and EORI) provide these logical operations with all sizes of immediate data. The TST
instruction compares the operand with zero arithmetically, placing the result in the condition
code register. Table 3–3 summarizes the logical operations.
3-6
MC68030 USER’S MANUAL
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