MC68030 Datasheet, PDF (49/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Data Organization and Addressing Capabilities
2.4.5 Address Register Indirect with Predecrement Mode
In the address register indirect with predecrement mode, the operand is in memory, and the
address of the operand is in the address register specified by the register field. Before the
operand address is used, it is decremented by one, two, or four depending on the operand
size: byte, word, or long word. Coprocessors may support decrementing for any operand
size up to 255 bytes. If the address register is the stack pointer and the operand size is byte,
the address is decremented by two rather than one to keep the stack pointer aligned to a
word boundary.
GENERATION:
An = An – SIZE
EA = (An)
ASSEMBLER SYNTAX:
– (An)
MODE:
100
REGISTER:
n
31
0
ADDRESS REGISTER:
An
MEMORY ADDRESS
OPERAND LENGTH (1, 2, OR 4):
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS: 0
31
0
OPERAND
MOTOROLA
MC68030 USER’S MANUAL
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