MC68030 Datasheet, PDF (285/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Exception Processing
8.2.3 Completing the Bus Cycles with Rte
Another method of completing a faulted bus cycle is to allow the processor to rerun the bus
cycles during execution of the RTE instruction that terminates the exception handler. This
method cannot be used to recover from address errors. The RTE instruction is always
executed. Unless the handler routine has corrected the error and cleared the fault (and
cleared the rerun and DF bits of the SSW), the RTE instruction can complete the bus
cycle(s). If the DF bit is still set at the time of the RTE execution, the faulted data cycle is
rerun by the RTE instruction. If the fault bit for a stage of the pipe is set and the
corresponding rerun bit was not cleared by the software, the RTE reruns the associated
instruction prefetch. The fault occurs again unless the cause of the fault, such as a non-
resident page in a virtual memory system, has been corrected. If the rerun bit is set for a
stage of the pipe and the fault bit is cleared, the associated prefetch cycle may or may not
be run by the RTE instruction (depending on whether the stage is required).
If a fault occurs when the RTE instruction attempts to rerun the bus cycle(s), the processor
creates a new stack frame on the supervisor stack after deallocating the previous frame, and
address error or bus error exception processing starts in the normal manner.
The read-modify-write operations of the MC68030 can also be completed by the RTE
instruction that terminates the handler routine. The rerun operation, executed by the RTE
instruction with the DF bit of the SSW set, reruns the entire instruction. If the cause of the
error has been corrected, the handler does not need to emulate the instruction but can leave
the DF bit set and execute the RTE instruction.
Systems programmers and designers should be aware that the MMU of the MC68030 treats
any bus cycle with RMC asserted as a write operation for protection checking, regardless of
the state of R/W signal. Otherwise, the potential for partially destroying system pointers with
CAS and CAS2 instructions exists since one portion of the write operation could take place
and the remainder be aborted by a bus error.
MOTOROLA
MC68030 USER’S MANUAL
8-31