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MC68030 Datasheet, PDF (446/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR
Instruction Execution Timing
CCn is the instruction-cache-case time for an instruction,
Tn is the tail time for an instruction,
Hn is the head time for an instruction, and
min(a,b) is the minimum of parameters a and b.
The instruction-cache-case time for most instructions is composed of the instruction-cache-
case time for the effective address calculation (CCea) overlapped with the instruction-
cache-case time for the operation (CCop). The more specific formula is:
where:
CCea1+[CCop1–min(Hop1,Tea1)]+[CCea2–min(Hea2,Top1)]+
[CCop2–min(Hop2,Tea2)]+[CCea3–min(Hea3,Top2)]+. . .
(11-2)
CCean is the effective address time for the instruction-cache case,
CCopn is the instruction-cache-case time for the operation portion of an instruction,
Tean is the tail time for the effective address of an instruction,
Hopn is the head time for the operation portion of an instruction,
Topn is the tail time for the operation portion of an instruction,
Hean is the head time for the effective address of an instruction, and
min(a,b) is the minimum of parameters a and b.
MOTOROLA
MC68030 USER’S MANUAL
11-11