MC68030 Datasheet, PDF (405/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
If the effective addressing mode specifies the predecrement mode, the address register
used is decremented by the size of the operand before the transfer. The bytes within the
operand are then transferred to or from ascending addresses beginning with the location
specified by the decremented address register. In this mode, if A7 is used as the address
register and the operand length is one byte, A7 is decremented by two to maintain a word-
aligned stack.
For the postincrement effective addressing mode, the address register used is incremented
by the size of the operand after the transfer. The bytes within the operand are transferred to
or from ascending addresses beginning with the location specified by the address register.
In this mode, if A7 is used as the address register and the operand length is one byte, A7 is
incremented by two after the transfer to maintain a word aligned stack. Transferring odd
length operands longer than one byte using the –(A7) or (A7)+ addressing modes can result
in a stack pointer that is not word aligned.
The processor repeats the effective address calculation each time this primitive is issued
during the execution of a given instruction. The calculation uses the current contents of any
required address and data registers. The instruction must include a set of effective address
extension words for each repetition of a calculation that requires them. The processor
locates these words at the current scanPC location and increments the scanPC by two for
each word referenced in the instruction stream.
The MC68030 sign-extends a byte or word-sized operand to a long-word value when it is
transferred to an address register (A0–A7) using this primitive with the register direct
effective addressing mode. A byte or word-sized operand transferred to a data register (D0–
D7) only overwrites the lower byte or word of the data register.
MOTOROLA
MC68030 USER’S MANUAL
10-45