MC68030 Datasheet, PDF (404/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
Even when the valid effective address fields specified in the primitive and in the instruction
operation word match, the MC68030 initiates protocol violation exception processing if the
primitive requests a write to a nonalterable effective address.
The length in bytes of the operand to be transferred is specified by bits [0-7] of the primitive
format. Several restrictions apply to operand lengths for certain effective addressing modes.
If the effective address is a main processor register (register direct mode), only operand
lengths of one, two, or four bytes are valid; all other lengths (zero, for example) cause the
main processor to initiate protocol violation exception processing. Operand lengths of 0-255
bytes are valid for the memory addressing modes.
The length of 0-255 bytes does not apply to an immediate operand. The length of an
immediate operand must be one byte or an even number of bytes (less than 256), and the
direction of transfer must be to the coprocessor; otherwise, the main processor initiates
protocol violation exception processing.
When the main processor receives this primitive during the execution of a general category
instruction, it verifies that the effective address encoded in the instruction operation word is
in the category specified by the primitive. If so, the processor calculates the effective
address using the appropriate effective address extension words at the current scanPC
address and increments the scanPC by two for each word referenced. The main processor
then transfers the number of bytes specified in the primitive between the operand CIR and
the effective address using long-word transfers whenever possible. Refer to 10.3.8
Operand CIR for information concerning operand alignment for transfers involving the
operand CIR.
The DR bit specifies the direction of the operand transfer. DR=0 requests a transfer from the
effective address to the operand CIR, and DR=1 specifies a transfer from the operand CIR
to the effective address.
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MC68030 USER’S MANUAL
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