EW31244SL7QV Datasheet, PDF (78/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
registers contain signatures that are device dependent. Refer to the AT Attachment with Packet
Interface-6 (ATA/ATAPI-6) Specification for more details regarding the values returned in the
Device-to-Host Register FIS.
A COMRESET may also be initiated by software writing the DET field of the SControl register.
A software reset is initiated by writing a one to the SRST bit (bit 2) (software reset bit) of the
Device Control register. A software reset simply initiates a device reset, and does not initiate any
serial link initialization sequence as described above based on a COMRESET. After a software
reset, the device will send a Device-to-Host Register FIS. The values returned in the Register FIS
are device-dependent, and provide information as far as the status of the drive. The Error register
contains a diagnostic code. The Sector Count, Sector Number, Cylinder Low, Cylinder High and
Device/Head registers contain signatures that are device dependent. Refer to the AT Attachment with
Packet Interface-6 (ATA/ATAPI-6) Specification for more details regarding the values returned in
the Device-to-Host Register FIS.
Devices that implement the packet command set may also be reset using the DEVICE RESET
command. This command may be issued to an individual device using the DEV bit without
affecting the other device. After the device is reset, it will return a Device-to-Host Register FIS.
The Error register contains a diagnostic code. The Sector Count, Sector Number, Cylinder Low,
Cylinder High and Device/Head registers contain signatures that are device dependent. Refer to the
AT Attachment with Packet Interface-6 (ATA/ATAPI-6) Specification for more details regarding the
values returned in the Device-to-Host Register FIS.
The EXECUTE DEVICE DIAGNOSTIC command may be used to initiate a device diagnostic.
After the device completes its diagnostic sequence, it will return a Device-to-Host Register FIS.
The Error register contains a diagnostic code. The Sector Count, Sector Number, Cylinder Low,
Cylinder High and Device/Head registers contain signatures that are device dependent. Refer to the
AT Attachment with Packet Interface-6 (ATA/ATAPI-6) Specification for more details regarding the
values returned in the Device-to-Host Register FIS.
Note:
In a Master/Slave setup, the GD31244 controller will merge the contents of the taskfile Error and
Status register values from the attached devices, in accordance with the ATA standard, to produce
the Error and Status register values visible to host software. Refer to the AT Attachment with Packet
Interface-6 (ATA/ATAPI-6) Specification for details.
Note:
In a Master/Slave setup, a hardware reset, a software reset, and an EXECUTE DEVICE
DIAGNOSTIC command will cause both master and slave devices to perform the requested task
simultaneously. However, a DEVICE RESET command may be targeted at only one device at a
time using the DEV bit in the Device/Head register.
78
April 2004
Developer’s Manual