EW31244SL7QV Datasheet, PDF (212/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.10.9.10 SU PCI DPA Command Register - SUPDCR
Table 127.
The SU PCI DPA Command Register is an 8-bit register. A command is initiated by writing this
register. Refer to the AT Attachment with Packet Interface-6 (ATA/ATAPI-6) Specification.
SU PCI DPA Command Register - SUPDCR
PCI
Attributes
7
43
0
rw rw rw rw rw rw rw rw
Bit
07:00
Default
00H
DPA Mode BAR0 Offset
Port 0 = 21DH, Port 1 = 41DH
Port 2 = 61DH, Port 3 = 81DH
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
WO = Write Only
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Description
Command - This register is used to initiate a command. This register must be written last. For example,
it must be written after the other Command Block registers are written. Because the rest of the registers
are parameters for the command.
212
April 2004
Developer’s Manual