EW31244SL7QV Datasheet, PDF (225/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.10.12.3 SU PCI DPA SATA SControl Register - SUPDSSCR
Table 137.
The SU PCI DPA SATA SControl Register provides the interface by which software controls the
SATA interface capabilities. Refer to the Serial ATA Specification. The GD31244 controller does
not support Interface Power Management (IPM). Writing to the IPM field will have no effect.
SU PCI DPA SATA SControl Register - SUPDSSCR
PCI
Attributes
31
28
24
20
16
12
8
4
0
rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rw rw rw rw rw rw rw rw rw rw rw rw
PCI IDE Mode BAR5 Offset
= 008H,
DPA Mode BAR0 Offset
Port 0 = 308H, Port 1 = 508H
Port 2 = 708H, Port 3 = 908H
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Bit
Default
Description
31:12
0000 0h Reserved
11:08
0000₂
IPM - The IPM field represents the enabled interface power management states that may be invoked:
0000₂ - No interface power management state restrictions
0001₂ - Transitions to the PARTIAL power management state disabled
0010₂ - Transitions to the SLUMBER power management state disabled
0011₂ - Transitions to the PARTIAL and SLUMBER power slumber management states disabled
All other values are reserved.
NOTE: Note that the GD31244 controller does not support Interface Power Management (IPM). Writing
to the IPM field will have no effect.
07:04
03:00
SPD - The SPD field represents the maximum allowed communication speed to negotiate
0000₂
0000₂ - No speed negotiation restrictions
0001₂ - Limit speed negotiation to a rate not greater than Generation 1 communication rate
All other values are reserved.
DET - The DET field controls the host adapter device detection and interface initialization.
In PCI IDE mode, after PCI RESET is deasserted, the default value of this field will be 0000₂. This will
implicitly initiate an initialization sequence.
In DPA mode, after PCI RESET is deasserted, the default value of this field will be 0100₂. This will
cause the PHY to stay offline, and will not cause an initialization sequence. To exit the offline state, a
0000₂ must be written. The transition from 0100₂ -> 0000₂ will initiate an initialization sequence.
Varies with
external state _{00002 - No device detection or initialization action requested. The DET field must be returned into this}
of
state from any other states. For example, when an initialization sequence (writing 0001₂) is to
DPA_MODE#
pin
be initiated, the write sequence to the DET field need to be as follows: 0000₂->0001₂->0000₂.
0001₂ - Perform interface communication initialization sequence (hard reset). The initialization
sequence is triggered when the DET field transitions from 0000₂->0001₂. Once a value of 0001₂
is written to the DET field, a write of 0000₂ may immediately follow. When a second transition of
0000₂->0001₂ is detected while a previous initialization sequence is in progress, a new initial-
ization sequence will be re-triggered.
0100₂ - Disable the Serial ATA interface and put the PHY in offline mode.
All other values are reserved.
Developer’s Manual
April 2004
225