EW31244SL7QV Datasheet, PDF (12/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
98 SU IDE Sector Number Register - SUISNR ............................................................................. 170
99 SU IDE Cylinder Low Register - SUICLR ................................................................................. 171
100 SU IDE Cylinder High Register - SUICHR................................................................................ 172
101 SU IDE Device/Head Register - SUIDHR................................................................................. 173
102 SU IDE Status Register - SUISR .............................................................................................. 174
103 SU IDE Command Register - SUICR ....................................................................................... 175
104 SU IDE Device Control Register - SUIDCR.............................................................................. 176
105 SU IDE Alternate Status Register - SUIASR ............................................................................ 177
106 SU IDE Channel 0 DMA Command Register - SUICDCR0...................................................... 178
107 SU IDE Channel 0 DMA Status Register - SUICDSR0 ............................................................ 179
108 SU IDE Channel 0 DMA Descriptor Table Pointer Register - SUICDDTPR0 ........................... 180
109 SU IDE Channel 1 DMA Command Register - SUICDCR1...................................................... 181
110 SU IDE Channel 1 DMA Status Register - SUICDSR1 ............................................................ 182
111 SU IDE Channel 1 DMA Descriptor Table Pointer Register - SUICDDTPR1 ........................... 183
112 Configuration Space Comparison............................................................................................. 184
113 SATA Port Registers Mapping in PCI DPA Mode .................................................................... 185
114 SU PCI DPA Base Address Register 0 - SUDBAR0 ................................................................ 192
115 SU PCI DPA Upper Base Address Register 0 - SUPDUBAR0 ................................................ 193
116 SU PCI DPA Interrupt Pending Register - SUPDIPR ............................................................... 194
117 SU PCI DPA Interrupt Mask Register - SUPDIMR ................................................................... 200
118 SU PCI DPA Data Port Register - SUPDDR ............................................................................ 203
119 SU PCI DPA Error Register - SUPDER.................................................................................... 204
120 SU PCI DPA Features Register - SUPDFR.............................................................................. 205
121 SU PCI DPA Sector Count Register - SUPDSCR .................................................................... 206
122 SU PCI DPA Sector Number Register - SUPDSNR ................................................................. 207
123 SU PCI DPA Cylinder Low Register - SUPDCLR..................................................................... 208
124 SU PCI DPA Cylinder High Register - SUPDCHR ................................................................... 209
125 SU PCI DPA Device/Head Register - SUPDDHR .................................................................... 210
126 SU PCI DPA Status Register - SUPDSR ................................................................................. 211
127 SU PCI DPA Command Register - SUPDCR ........................................................................... 212
128 SU PCI DPA Alternate Status Register - SUPDASR................................................................ 213
129 SU PCI DPA Device Control Register - SUPDDCTLR ............................................................. 214
130 SU PCI DPA Upper DMA Descriptor Table Pointer Register - SUPDUDDTPR ....................... 215
131 SU PCI DPA Upper DMA Data Buffer Pointer Register - SUPDUDDPR ................................. 216
132 SU PCI DPA DMA Command Register - SUPDDCMDR.......................................................... 217
133 SU PCI DPA DMA Status Register - SUPDDSR ...................................................................... 218
134 SU PCI DPA DMA Descriptor Table Pointer Register - SUPDDDTPR .................................... 219
135 SU PCI DPA SATA SStatus Register - SUPDSSSR ................................................................ 220
136 SU PCI DPA SATA SError Register - SUPDSSER .................................................................. 222
137 SU PCI DPA SATA SControl Register - SUPDSSCR .............................................................. 225
138 SU PCI DPA Set Device Bits Register - SUPDSDBR .............................................................. 226
139 SU PCI DPA PHY Feature Register - SUPDPFR..................................................................... 227
140 SU PCI DPA BIST FIS Control and Status Register - SUPDBFCSR ....................................... 228
141 SU PCI DPA BIST Errors Register - SUPDBER ...................................................................... 231
142 SU PCI DPA BIST Frames Register - SUPDBFR .................................................................... 232
143 SU PCI DPA Host BIST Data Low Register - SUPDHBDLR .................................................... 233
144 SU PCI DPA Host BIST Data High Register - SUPDHBDHR .................................................. 234
145 SU PCI DPA Device BIST Data Low Register - SUPDDBDLR ................................................ 235
146 SU PCI DPA Device BIST Data High Register - SUPDDBDHR ............................................... 236
147 SU PCI DPA Device BIST Data High Register - SUPDDBDHR ............................................... 237
12
April 2004
Developer’s Manual