EW31244SL7QV Datasheet, PDF (207/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.10.9.5
Table 122.
SU PCI DPA Sector Number Register - SUPDSNR
The SU PCI DPA Sector Number Register is a 16-bit read/write register. The content of the SU PCI
DPA Sector Number Register is a command parameter. The content of this register must be loaded
before the SU PCI DPA Command Register is written. The content of this register is command
dependent. Refer to the AT Attachment with Packet Interface-6 (ATA/ATAPI-6) Specification.
SU PCI DPA Sector Number Register - SUPDSNR
PCI
Attributes
15
12
8
4
0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
DPA Mode BAR0 Offset
Port 0 = 20CH, Port 1 = 40CH
Port 2 = 60CH, Port 3 = 80CH
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Bit
Default
Description
15:00
Sector Number/LBA Low- This field is dependent on the device access methods. There are three
method:
Device
Dependent ^a
• CHS addressing: This field indicates the device sector number to request as part of the
Cylinder/Head/Sector format.
• 28-bit LBA addressing: This lower eight bits of this field is used for bit positions LBA[7:0] of the
28-bit address LBA[27:0].
• 48-bit LBA addressing: This upper and lower bytes of this field is used for bit positions LBA[31:24]
and LBA[7:0] respectively of the 48-bit addressing LBA[47:0].
a. After a hardware reset, software reset, or an EXECUTE DEVICE DIAGNOSTIC command, the device will return a signature value. The signature
value is device dependent. Refer to the AT Attachment with Packet Interface-6 (ATA/ATAPI-6) Specification.
Developer’s Manual
April 2004
207