EW31244SL7QV Datasheet, PDF (3/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Contents
1 About This Document ....................................................................................................................15
1.1 Reference Documents ........................................................................................................15
1.2 Terminology and Conventions ............................................................................................16
1.2.1 Representing Numbers ..........................................................................................16
1.2.2 Fields ..................................................................................................................... 16
1.2.3 Specifying Bit and Signal Values ........................................................................... 17
1.2.4 Signal Name Conventions .....................................................................................17
1.2.5 Terminology ........................................................................................................... 18
2 Overview........................................................................................................................................ 21
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
Features.............................................................................................................................. 22
PCI-X Interface ................................................................................................................... 22
PCI Commands Supported in M/S (PCI IDE) Mode ...........................................................23
2.3.1 PCI Commands Supported in DPA Mode.............................................................. 24
Serial ATA Interface............................................................................................................ 25
Modes of Operation ............................................................................................................ 27
2.5.1 Master/Slave Mode (or PCI IDE Mode) ................................................................. 27
2.5.2 Direct Port Access Mode ....................................................................................... 27
2.5.3 Selecting DPA or M/S Mode .................................................................................. 28
2.5.4 DPA Mode Port Initialization .................................................................................. 28
Serial EEPROM Interface ................................................................................................... 29
Extended Voltage Mode ..................................................................................................... 29
ACTIVITY LEDS ................................................................................................................. 30
2.8.1 Reference Clock Generation ................................................................................. 31
High-End Storage Features ................................................................................................ 31
JTAG Interface....................................................................................................................31
3 Serial EEPROM............................................................................................................................. 32
3.1 Write Status Register (WRSR) Command .......................................................................... 34
3.1.1 PROGRAM Command........................................................................................... 35
3.1.2 READ Command ................................................................................................... 36
3.1.3 Write Disable (WRDI) Command ........................................................................... 37
3.1.4 Read Status Register (RDSR) Command.............................................................. 38
3.1.5 Write Enable (WREN) Command .......................................................................... 39
3.1.6 Sector Erase (SECT_ERASE) Command ............................................................. 40
3.1.7 CHIP_ERASE Command ...................................................................................... 41
3.1.8 Read ID Register (RDID) Command...................................................................... 42
3.1.9 Serial EEPROM SPI Interface – Address 90h ....................................................... 43
3.1.9.1 Programming Details ............................................................................. 43
3.1.9.2 SPI Command / Control / Status Register - Address 90h ...................... 45
3.1.9.2.1 SPI Command ................................................................................. 45
3.1.9.2.2 SPI Control...................................................................................... 45
3.1.9.2.3 SPI Status ....................................................................................... 45
3.1.9.3 SPI Data Register - Address 94h ...........................................................46
3.1.10 Detection of the EEPROM at Power-Up ................................................................ 46
Developer’s Manual
April 2004
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