EW31244SL7QV Datasheet, PDF (175/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.10.3.10 SU IDE Command Register - SUICR
Table 103.
The SU IDE Command Register is a write-only register. When the SU IDE Command register is
read, instead the SU IDE Status register will be read. A command is initiated by writing this
register. Refer to the AT Attachment with Packet Interface-6 (ATA/ATAPI-6) Specification.
SU IDE Command Register - SUICR
PCI
Attributes
7
4
0
wo wo wo wo wo wo wo wo
Bit
07:00
PCI IDE Mode BAR0/BAR2 Offset
= 07H
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
WO = Write Only
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Default
00H
Description
Command - This register is used to initiate a command. This register must be written last. For example,
it must be written after the other Command Block registers are written. Because the rest of the registers
are parameters for the command.
Developer’s Manual
April 2004
175