EW31244SL7QV Datasheet, PDF (216/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.10.11.2 SU PCI DPA Upper DMA Data Pointer Register - SUPDUDDBPR
Table 131.
This SU PCI DPA Upper DMA Data Pointer Register contains the upper 32-bit PCI address of the
64-bit PCI address. All the descriptors in the descriptor table share this register. For example, all
the data buffers must be located in the same 4 Gbyte memory space.
SU PCI DPA Upper DMA Data Buffer Pointer Register - SUPDUDDPR
PCI
Attributes
31
28
24
20
16
12
8
4
0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
DPA Mode BAR0 Offset
Port 0 = 26CH, Port 1 = 46CH
Port 2 = 66CH, Port 3 = 86CH
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
Bit
31:00
Default
Description
0000 0000H PCI Address - The PCI source/destination upper address.
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
216
April 2004
Developer’s Manual