EW31244SL7QV Datasheet, PDF (49/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Functional Blocks
Figure 14.
A FIS is a group of 32-bit words that may either be sent by the device or the controller. A FIS is
packetized, by the Link layer, by inserting SOF and EOF fields before being sent over the serial bus
by the PHY layer. Figure 14 shows the SATA protocol layers.
Transport Layer: This layer simply constructs FISs for transmission and decomposes received FISs.
As an example, when the application layer (higher layer) wishes to access the
device, it loads the appropriate value in the SRB (command last). Once the
command is written, the Transport Layer converts the SRB content into
appropriate FISs that is passed to the Link Layer. The opposite happens on the
device. For example, the Transport Layer converts the received FISs from the Link
Layer and passes it to the higher layer.
Link Layer:
This layer simply transmits and receives frames. On the transmitter side, the Link
Layer inserts frame envelope around the Transport Layer data. For example, the Link
Layer inserts primitives like SOF, CRC, and EOF around the FISs from the Transport
Layer. The opposite happens on the receiver side. For example, the Link Layer
extracts the primitives from the frame and passes the FISs to the Transport Layer.
Physical Layer: This layer simply serialize the data from the link layer and deserialize the serial
stream and passes the data to the Link Layer.
SATA Protocol Layers
Shadow
Register
Block
Transport Layer
Device
Registers
Transport Layer
Link Layer
Physical Layer
Host Layers
Serial Bus
Link Layer
Physical Layer
Device Layers
Developer’s Manual
April 2004
49