EW31244SL7QV Datasheet, PDF (189/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
Table 113.
SATA Port Registers Mapping in PCI DPA Mode (Sheet 5 of 7)
Register Name
SU PCI DPA Host DMA Transfer Count Register - SUPDHDTCR
SU PCI DPA Host Reserved DWORD Register 1- SUPDHRDR 1.
SU PCI DPA Device DMA Buffer Identifier Low Register - SUPDDDBILR
SU PCI DPA Device DMA Buffer Identifier High Register - SUPDDDBIHR
SU PCI DPA Device Reserved DWORD Register 0 - SUPDDRDR0
SU PCI DPA Device DMA Buffer Offset Register - SUPDDDBOR
SU PCI DPA Device DMA Transfer Count Register - SUPDDTCR
Reserved Word
Reserved Word
Reserved Word
Reserved Word
Offset
Port 0 - 37CH
Port 1 - 57CH
Port 2 - 77CH
Port 3 - 87CH
Port 0 - 380H
Port 1 - 580H
Port 2 - 780H
Port 3 - 980H
Port 0 - 384H
Port 1 - 584H
Port 2 - 784H
Port 3 - 984H
Port 0 - 388H
Port 1 - 588H
Port 2 - 788H
Port 3 - 988H
Port 0 - 38CH
Port 1 - 58CH
Port 2 - 78CH
Port 3 - 98CH
Port 0 - 390H
Port 1 - 590H
Port 2 - 790H
Port 3 - 990H
Port 0 - 394H
Port 1 - 594H
Port 2 - 794H
Port 3 - 994H
Port 0 - 398H
Port 1 - 598H
Port 2 - 798H
Port 3 - 998H
Port 0 - 39CH
Port 1 - 59CH
Port 2 - 79CH
Port 3 - 99CH
Port 0 - 3A0H
Port 1 - 5A0H
Port 2 - 7A0H
Port 3 - 9A0H
Port 0 - 3A4H
Port 1 - 5A4H
Port 2 - 7A4H
Port 3 - 9A4H
Developer’s Manual
April 2004
189