EW31244SL7QV Datasheet, PDF (74/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.3
ATA Command Processing
A command is issued to a device by writing the Command Block Registers. The command register
should be written last, after the rest of the registers are written. The rest of the registers, except for
the data port register, are parameters based on the command. Writing the command register
initiates a transfer of a Register FIS from the controller to the device.
Commands may be categorized as data and non-data commands. Non-data commands do not
involve data transfer. Examples of such commands are:
• SEEK
• IDLE
• SLEEP
• NOP
• FLUSH CACHE
• STANDBY
Refer to the AT Attachment with Packet Interface-6 (ATA/ATAPI-6) Specification. Data commands
involve the transfer of one or more blocks of data. There are two classes of data commands. There
are data commands that use the DMA protocol to transfer data and others that use the PIO protocol.
Examples of PIO data commands are:
• READ BUFFER
• WRITE BUFFER
• READ SECTOR
• WRITE SECTOR
Examples of DMA data commands are:
• READ DMA
• WRITE DMA
For PIO commands, data is transferred by either reading or writing the Command Block Data Port
Register.
An ATA device is addressed by using two methods:
CHS Cylinder/Head/Sector.
LBA Logical Block Addressing.
Disk assembly of a drive usually consists of a number of surfaces, each of which stores data on
concentric circles called tracks. The tracks are further divided into sectors, which are the smallest
readable/writable units. A sector is accessed by first positioning the read/write head above the
proper track and then waits until the desired sector rotates underneath the head to read or write the
data. Writing and reading the sector is done serially bit-by-bit.
A drive usually contains multiple disks, and both sides of the a disk may be utilized for storage.
Each surface has its own read/write head although only one track may be written to or read at a
given time. The heads are positioned collectively over the tracks. A set of tracks that may be
accessed by the heads from a single position is a cylinder. A consequence of this organization is
that every sector may be addressed by its Cylinder, Head, and Sector Numbers. This is referred to
as the drive geometry.
In LBA mode, the drive presents itself as a continuous sequence of sectors or blocks which are
addressed by their logical block number, like 0, 1, 2,...N-1, where N is the number of sectors on the
drive. In this case the drive physical geometry (CHS) need not be known to the host. For example,
the drive presents itself more or less like random memories are presented where an address is used
to select a byte from an array of bytes, thus the actual topology of the memory bits need not be
known by the user.
74
April 2004
Developer’s Manual