EW31244SL7QV Datasheet, PDF (248/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.10.12.24 SU PCI DPA Host Reserved DWORD Register 0 - SUPDHRDR0
Table 158.
The SU PCI DPA Received Host Reserved Register 0 is the third DWORD parameter of the SATA
DMA Setup Host-to-Device FIS. Refer to the Serial ATA Specification.
SU PCI DPA Device Reserved DWORD Register 0 - SUPDDRDR0
PCI
Attributes
31
28
24
20
16
12
8
4
0
ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro
PCI IDE Mode Offset
= 08CH,
DPA Mode Offset
Port 0 = 38CH, Port 1 = 58CH
Port 2 = 78CH, Port 3 = 98CH
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
Bit
31:00
Default
Description
0000_0000H Reserved DWORD in the SATA DMA Setup Device-to-Host FIS.
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
248
April 2004
Developer’s Manual