English
Language : 

EW31244SL7QV Datasheet, PDF (230/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller
Intel® 31244 PCI-X to Serial ATA Controller
Programming Interface
Table 140. SU PCI DPA BIST FIS Control and Status Register - SUPDBFCSR (Sheet 3 of 3)
PCI
Attributes
31
28
24
20
16
12
8
4
0
rw rw rw rw rv rv rw rw rw rv rv rv rv rv rv rw ro ro ro ro ro ro ro rw rw rw rw rw rw rw rw rw
PCI IDE Mode Offset
= 044H,
Bit
Default
00
02
DPA Mode Offset
Port 0 = 344H, Port 1 = 544H
Port 2 = 744H, Port 3 = 944H
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Description
Initiate a near end transmit-only based upon bits 6, 5, 4, and 2 and BIST DWORDs - SU PCI DPA Host
BIST Data Low Register - SUPDHBDLR and SU PCI DPA Host BIST Data High Register -
SUPDHBDHR.
To command the receiver into a Far-End Retimed loopback mode, bit 3 of the BIST FIS Control
and Status Register must be set. To command the receiver into the Far-End Analog loopback mode,
bit 1 must be set. After the appropriate bit(s) are set in bits [6:1], the BIST Activate FIS may be
sent to the receiving device by setting bit 7. The GD31244 controller also provides the following
registers for monitoring the BIST tests:
• BIST Error register
• BIST Frame register
The BIST Errors register tracks the number of errors detected. The BIST Frame register tracks
when the 16-bit counting pattern is selected and the number of BIST frames encountered. A frame
is defined as one 6-bit counting pattern sequence. The following steps provide an example of how
to set up and initiate a loopback test:
1. Set bit 25 to reset the BIST Errors and BIST Frames registers.
2. Set bits [31:30] to select one of the BIST patterns.
3. Set bits [29:28] with the same value as bits [31:30]. These bits define the pattern used for
checking the data stream.
4. Set bit 1 to select AFE or bit 3 to select Retimed loopback.
5. Set bit 24 to enable the pattern generator.
6. Set bit 23 to enable the pattern checker.
Note: To conclude the loopback test, the far-end device must be reset using a COMRESET/COMINIT
sequence.
230
April 2004
Developer’s Manual