EW31244SL7QV Datasheet, PDF (242/252 Pages) Intel Corporation – Intel® 31244 PCI-X to Serial ATA Controller

Intel^® 31244 PCI-X to Serial ATA Controller
Programming Interface
5.10.12.18 SU PCI DPA Host Reserved DWORD Register 0 - SUPDHRDR0
Table 152.
The SU PCI DPA Host Reserved Register 0 is the third DWORD parameter of the SATA DMA
Setup Host-to-Device FIS. Refer to the Serial ATA Specification.
SU PCI DPA Host Reserved DWORD Register 0 - SUPDHRDR 0
PCI
Attributes
31
28
24
20
16
12
8
4
0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
PCI IDE Mode Offset
= 074H,
DPA Mode Offset
Port 0 = 374H, Port 1 = 574H
Port 2 = 774H, Port 3 = 974H
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
Bit
31:00
Default
Description
0000_0000H Reserved DWORD in the SATA DMA Setup Host-to-Device FIS.
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
242
April 2004
Developer’s Manual