HD6417750 Datasheet, PDF (990/1039 Pages) Renesas Technology Corp – SuperH RISC engine

Table A.1 Address List (cont)
Area 7
Power-On Manual
Module Register P4 Address Address^*1 Size Reset
Reset
BSC WCR3 H'FF80 0010 H'1F80 0010 32 H'0777 7777 Held
BSC MCR
H'FF80 0014 H'1F80 0014 32 H'0000 0000 Held
BSC PCR
H'FF80 0018 H'1F80 0018 16 H'0000
Held
BSC RTCSR H'FF80 001C H'1F80 001C 16 H'0000
Held
BSC RTCNT H'FF80 0020 H'1F80 0020 16 H'0000
Held
BSC RTCOR H'FF80 0024 H'1F80 0024 16 H'0000
Held
BSC RFCR H'FF80 0028 H'1F80 0028 16 H'0000
Held
BSC PCTRA H'FF80 002C H'1F80 002C 32 H'0000 0000 Held
BSC PDTRA H'FF80 0030 H'1F80 0030 16 Undefined Held
BSC PCTRB H'FF80 0040 H'1F80 0040 32 H'0000 0000 Held
BSC PDTRB H'FF80 0044 H'1F80 0044 16 Undefined Held
BSC GPIOIC H'FF80 0048 H'1F80 0048 16 H'0000 0000 Held
BSC SDMR2 H'FF90 xxxx H'1F90 xxxx 8 Write-only
BSC SDMR3 H'FF94 xxxx H'1F94 xxxx 8
Synchro-
nization
Sleep Standby Clock
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Held Held Bclk
Bclk
Bclk
DMAC SAR0
H'FFA0 0000 H'1FA0 0000 32 Undefined Undefined Held Held Bclk
DMAC DAR0
H'FFA0 0004 H'1FA0 0004 32 Undefined Undefined Held Held Bclk
DMAC DMATCR0 H'FFA0 0008 H'1FA0 0008 32 Undefined Undefined Held Held Bclk
DMAC CHCR0 H'FFA0 000C H'1FA0 000C 32 H'0000 0000 H'0000 0000 Held Held Bclk
DMAC SAR1
H'FFA0 0010 H'1FA0 0010 32 Undefined Undefined Held Held Bclk
DMAC DAR1
H'FFA0 0014 H'1FA0 0014 32 Undefined Undefined Held Held Bclk
DMAC DMATCR1 H'FFA0 0018 H'1FA0 0018 32 Undefined Undefined Held Held Bclk
DMAC CHCR1 H'FFA0 001C H'1FA0 001C 32 H'0000 0000 H'0000 0000 Held Held Bclk
DMAC SAR2
H'FFA0 0020 H'1FA0 0020 32 Undefined Undefined Held Held Bclk
DMAC DAR2
H'FFA0 0024 H'1FA0 0024 32 Undefined Undefined Held Held Bclk
DMAC DMATCR2 H'FFA0 0028 H'1FA0 0028 32 Undefined Undefined Held Held Bclk
DMAC CHCR2 H'FFA0 002C H'1FA0 002C 32 H'0000 0000 H'0000 0000 Held Held Bclk
DMAC SAR3
H'FFA0 0030 H'1FA0 0030 32 Undefined Undefined Held Held Bclk
DMAC DAR3
H'FFA0 0034 H'1FA0 0034 32 Undefined Undefined Held Held Bclk
DMAC DMATCR3 H'FFA0 0038 H'1FA0 0038 32 Undefined Undefined Held Held Bclk
DMAC CHCR3 H'FFA0 003C H'1FA0 003C 32 H'0000 0000 H'0000 0000 Held Held Bclk
DMAC DMAOR H'FFA0 0040 H'1FA0 0040 32 H'0000 0000 H'0000 0000 Held Held Bclk
Rev. 6.0, 07/02, page 938 of 986