HD6417750 Datasheet, PDF (712/1039 Pages) Renesas Technology Corp – SuperH RISC engine

16.1.3 Pin Configuration
Table 16.1 shows the SCIF pin configuration.
Table 16.1 SCIF Pins
Pin Name
Abbreviation
I/O
Function
Serial clock pin
SCK2/05(6(7 Input
Clock input
Receive data pin
MD2/RxD2
Input
Receive data input
Transmit data pin
MD1/TxD2
Output Transmit data output
Modem control pin &765
I/O
Transmission enabled
Modem control pin MD8/5765
I/O
Transmission request
Note:
After a power-on reset, these pins function as mode input pins MD0, MD1, MD2, MD7, and
MD8. These pins can function as serial pins by setting the SCIF operation with the TE, RE,
and CKE1 bits in SCSCR2 and the MCE bit in SCFCR2. These pins are made to function
as serial pins by performing SCIF operation settings with the TE, RE, and CKE1 bits in
SCSCR2 and the MCE bit in SCFCR2. Break state transmission and detection can be set in
the SCIF’s SCSPTR2 register.
Rev. 6.0, 07/02, page 660 of 986