HD6417750 Datasheet, PDF (616/1039 Pages) Renesas Technology Corp – SuperH RISC engine

CLK
A25–A0
D63–D0
CMD
DTR
MD = 10
Wait for next DMA request
CA
CA
D0 D1 D2 D3
RD
RD
D0 D1 D2 D3
ID1, ID0
Start of data transfer
Figure 14.44 Single Address Mode/Burst Mode/Level Detection/
External Bus → External Device Data Transfer
CLK
A25–A0
D63–D0
CMD
DQMn
CA
DTR
MD = 01
RD
CA
D0
Idle cycle
RD
CA
D2
D3
Idle cycle
RD
Idle cycle
ID1, ID0
Figure 14.45 Single Address Mode/Burst Mode/Edge Detection/Byte, Word, Longword,
Quadword/External Bus → External Device Data Transfer
Rev. 6.0, 07/02, page 564 of 986