HD6417750 Datasheet, PDF (771/1039 Pages) Renesas Technology Corp – SuperH RISC engine

Initialization
Clear TE and RE bits
in SCSCR1 to 0
1
Clear FER/ERS, PER, and
ORER flags in SCSCR1 to 0
2
In SCSMR1, set parity in O/ bit,
clock in CKS1 and CKS0 bits, 3
and set GM
Set SMIF, SDIR, and SINV bits
in SCSCMR1
4
Set value in SCBRR1
5
In SCSCR1, set clock in CKE1
and CKE0 bits, and clear TIE, ₆
RIE, TE, RE, MPIE, and
TEIE bits to 0.
Wait
1-bit interval elapsed?
No
Yes
Set TIE, RIE, TE, and RE bits
in SCSCR1
7
End
Figure 17.7 Sample Initialization Flowchart
Rev. 6.0, 07/02, page 719 of 986